About the Training Course

Proper power distribution design is an absolute must in today's high-speed electronics, both high power and low power. Insufficient power distribution has serious adverse effects on signal integrity and EMC alike. This one day Power Distribution Design training course provides an overview of good power distribution design practices. Good and bad solutions are illustrated and put into context of layout constraints, cost and performance.
The primary focus of the training course is to give the necessary information with minimal mathematics so that designers can apply the trade-offs and design solutions in their everyday work. The course is illustrated by live HW and SW demonstrations.

Who is this training course for?

• Working Board Design engineers, layout engineers and system designers who are interested in better understanding of potential power-distribution problems, and how to overcome these problems with proper component selection and layout techniques.
• Working signal-integrity and EMI/EMC engineers who are interested in achieving a better understanding of the potential problems caused by improper power distribution designs, and how to correct them.
• Managers and engineers who are interested in understanding trade-offs of power-distribution design decisions.

Training Course Content

• Signal Spectrum, bandwidth of power-distribution noise
• Interaction of power integrity, signal integrity and EMC
• Network matrices: impedance, admittance, scattering, and transfer matrices
• Linear network characteristics, time and frequency-domain solutions, moving between the domains

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• Simultaneous switching noise (SSN)
• Models of vias and pads, models of various capacitors and power planes
• DC drop on power planes, optimization of plane voltage drop
• DC-DC converters in the power distribution network, transfer functions, output impedance
• Creating flat impedance response, conditions for smooth impedance profiles
• Bypass capacitor selection: multi-pole, Big-V, Flat impedance profile synthesis, area capacitors, 'capacitor sprinkling'
• Stackup/layout considerations, proper location and placement of capacitors
• High-frequency response, plane modal resonances
• Designing PDN filters: low-Q transfer functions, lossy ferrites
• Transient analysis of PDNs with SPICE and with network functions
• Finding worst-case transient response of PDNs, optimization of bypass network
• Measurement and simulation of PDNs, selection of probes and instruments

About the Lecturer

Istvan Novak,
Distinguished Engineer, Signal and Power Integrity, at SUN Microsystems, Inc.

In the past ten years Dr. Novak was responsible for the power distribution and high-speed signal integrity designs of SUN's succesful workgroup server families. He introduced the industry's first 25um power-ground laminates for large rigid computer boards, and worked with component vendors to create a series of low-inductance and controlled-ESR bypass capacitors.
Dr. Novak also served as SUN's representative on the Copper Cable and Connector Workgroup of InfiniBand, and is engaged in the methodologies, designs and characterization of power-distribution networks and CPU packages. He has thirty years of experience with high-speed digital, RF, and analog circuit and system design and has twenty five patents.
He is Fellow of IEEE for his contributions to the signal-integrity and RF measurement as well as simulation methodologies, co-author of the book "Frequency-Domain Characterization of Power Distribution Networks" (Artech House, 2007) and Executive Editor of the book ) (IEC, 2008).