About the Training Course

Developed and taught by Dr Howard Johnson, the world's foremost authority on Signal Integrity! This is an advanced-level course for experienced digital designers who want to press their designs to the upper limits of speed and distance. It is an advanced sequel to the 2 courses High-Speed Digital Design and Advanced High-Speed Signal Propagation by Dr Howard Johnson. Focusing on interactions between your system and the natural world around it, including:

• Radiation
• Susceptibility
• Electrostatic discharge

All students who attend our High-Speed Noise and Grounding course will receive a free copy of Dr Howard Johnson's High-Speed Noise and Grounding DVD.

Questions & Comments: all students who attend our High-Speed Noise and Grounding course have the opportunity to talk directly with Dr. Johnson

Course Benefits

• This is a practical course, filled with practical examples and explanations.
• Delegates without the benefit of formal training in analog circuit theory can use and apply the formulas and examples from this course to determine which of their circuits will encounter difficulties and how to fix them.
• Delegates who have completed (at least) a first-year university level class in introductory linear circuit theory will comprehend the material at a deeper level.

Who is this training course for?

This is an advanced course for Digital logic engineers, chip designers, system architects, EMC specialists, and applications engineers; anyone working with digital logic at speeds in excess of 1 GHz..

Training Course Content

Principles of Mixed Signal Isolation

Forms of Coupling

• Common Impedances
• Parasitic Mutual Capacitance
• Parasitic Mutual Inductance
• E&M Field Radiation

Points to Remember

• If my current path overlaps yours, we crosstalk.
• Some systems are orders of magnitude more sensitive to noise than others.
• The limits of acceptable crosstalk depend on your signal level and its required noise-free dynamic range.

Facts Necessary for Understanding High-Speed Noise and Grounding

• Current flows in loops.
• Loops may be completed by parasitic capacitance.
• All loops have inductance.

Mutual Inductance Matters

• Among high-speed, low impedance digital circuits, mutual inductance is often a worse problem than mutual capacitance.

Points to Remember

• All circuits suffer from parasitic shunt capacitance and parasitic series inductance.
• Mutual capacitance between devices can cause crosstalk.
• Mutual inductance can cause crosstalk as well.
• Among high-speed, low impedance digital circuits, mutual inductance is often a worse problem than mutual capacitance.

Frequencies That Matter for Digital Signals

• The power in a digital signal concentrates in the band from DC up to the Knee Frequency.
• Knee frequency is a function of rise/fall time, not repetition rate.

Five Ways to Reduce Crosstalk

• Shrink the Aggressor
• Reduce the Coupling
• Change the Timing
• Improve Receiver Margins
• Reduce the Number of Aggressors

Points to Remember

• A solid plane makes a very good defense against crosstalk.
• Synchronous signals suffer crosstalk only when sampling.
• Asynchronous signals remain sensitive to crosstalk at all times.

Ground Bounce (SSO)

In the presence of fast-changing magnetic fields,

• You can only measure voltages between nearby points.
• Use the shortest ground attachment possible on your probe.

Distributed nature of inductance

• The energy stored in an inductor is nothing more, and nothing less, than the energy stored in the magnetic field surrounding that inductor.
• The magnetic field exists in the spaces between conductors.
• Inductance is not a property of the conductors.
• Inductance is a property of the spaces between conductors.

Points to Remember

• Displacement current (due to parasitic capacitance) flows between otherwise unconnected regions.
• Magnetic induction from fast-changing magnetic fields induces voltages in your circuit.
• Never measure voltages between widely separated points.

BGA package crosstalk (SSO coupling) varies with:

• Separation between signal pathways
• Height of via + ball + package thickness
• Rise or fall time of the aggressive signal (specifically, the di/dt)

Points to Remember

• SSO is one of many forms of inductive crosstalk.
• SSO is caused by outgoing signal currents, and also by returning signal currents.
• SSO varies pin by pin.
• It increases as you approach aggressive signals.
• It decreases as you approach ground balls (ergo, use a lot of ground balls).

BGA Ground Ball Placement

Outline of Film

• What causes crosstalk in BGA packages?
• What can be done to improve it?
• Demonstrate crosstalk in a scale-model package.
• Compare alternative ground-ball layouts.

PCB Layer Stack

• The Path of Return Signal Current
• High-speed current follows the path of least inductance

Measuring Tiny Amounts of Crosstalk

• Counteracting parasitic effects of your probes

Differential Probing

• The differential probe does not require a ground wire, but it works better if you provide one directly from the scope to the device under test.

Points to Remember

• Do not trust "ground" symbols on your schematic.
• Draw out the whole circuit, including your scope.

Stacking Connectors

• Ground-transfer impedance

Points to Remember

• Object radiate in proportion to their height above the nearest solid plane.
• Stacking connectors exhibit a very significant ground transfer impedance.
• Returning signal current, multiplied times the ground transfer impedance, creates a measurable voltage on the piggyback card reference plane.

When to Segment the VCC Plane

• IC's with different power voltages
• PLL's or clock generators with special sensitivity to power supply noise
• I/O chips that must not have noise on their power terminals

Moat and Drawbridge Construction

• Can help reduce stray currents, but creates slots in your reference system

Points to Remember

• A slot in your reference plane creates unwanted inductance.
• Slot inductance slows down rising edges.
• Slot inductance creates mutual inductive crosstalk.
• If you use your power plane as a signal reference, the boundary from one power region to the next works like a slot or gap—routing across the boundary can dramatically increase crosstalk (see High-Speed Digital Design class notes, chapter 5).

Good High-Speed Practices for Big, Fat Boards

• Use ground planes to isolate pairs of routing layers.
• Lay power layers adjacent to grounds.
• Connect ground layers with numerous vias.

System-Level Grounding

Picture Frame Analysis

• A simplified method for understanding how common-mode noise moves in a complex system.

Three Big Ideas For Isolation (i.e., Reducing the Impact of Stray Current)

• High impedance blocks current
• Low impedance shunts current
• Change in topology

Points to Remember

• If you can't explain the operation of your isolation technique using a simple picture-frame model, you probably don't understand how it works.

Capacitance Between Boards

• Measurement technique and examples

Points to Remember

• Capacitance between boards conveys current from one board to another.
• Shunt that current to the reference plane using broad, flat straps or short, thick standoffs.

Interconnections Between Boxes

• Coaxial
• Twisted-pair
• Fiber-optic

Points to Remember

• The interconnection topology determines the magnitude of currents flowing on a coaxial shield
• The shield transfer impedance determines the noise pickup internal to a coaxial cable
• A twinax cable further attenuates the received noise
• Always test for crosstalk!

Crosshatched Ground: To what degree does patterning affect…

• Trace impedance
• Crosstalk

Clock-Related Noise Issues

Metastable MTBF: Points to Remember

• Slow down the sampling clock
• Get a better flip-flop
• Use multiple stages

Unexpected Synchronization Difficulties: Points to Remember

• Test your system with links unplugged
• Test your system with killer packets
• Test your system with input clocks adjusted to slightly different frequencies

Do Terminations Reduce Emissions: Points to Remember

• An long unterminated transmission line harbors resonances that exacerbate radiation at certain frequencies.
• Terminations can help.

In a differential link: Points to Remember

• Skew creates a common-mode signal
• DCD (individually on each output) creates a common-mode signal
• Common-mode signals radiate far more than differential signals

Jitter Effects in Modern System Design II

Outline of Presentation

• Tracking down jitter, like medicine, is a diagnostic science.
• You must make independent tests to see what actually causes your jitter.
• Planning for these tests is the most important thing you can do to address jitter in your high-speed system architecture.

Electromechanical Issues

Board-to-board Connector Electrical Noise Performance: Points to Remember

• The measure of connector noise-generating capability in a mixed-signal system is ground-transfer impedance.
• The ground-transfer impedance is a function of connector design and board layout.

Shielded Cabling Connectors: Points to Remember

• The ground-transfer impedance of a shielded connector determines the amount of stray current emanating from that location.
• Conversely, the ground-transfer impedance also determines the susceptibility of the interface.

Mechanical Issues: Key environmental parameters

• Shock and vibration
• Temperature
• Humidity
• Sand and dust
• Durability
• Electrostatic discharge (ESD)

Points to Remember

• Everything shakes
• Everything corrodes
• Every good ground contact eventually works free
• Everything intentionally not grounded eventually becomes so

Trends in Interconnect Design

• Smaller (better for RF); show examples
• Multiple contacts; show examples of advanced contact design

Standards-Based Design

• Why compete? Pick one of the standards and use most (if not all) of its standard parts.

Example of standards-based system: Firewire (IEEE 1394)

Points to Remember

• Easy: Figure out how to pass your data through a standard LAN architecture
• Hard: Design a new LAN

Tin Whisker Alert

• What is a tin whisker, and why does it matter to my design?

Points to Remember

• Keep abreast of the fast-changing "tin whisker" subject.
• In situations that require long-term reliability, do not use pure tin.

System Test

Eye Don't Like It

• An eye diagram makes a terrible diagnostic tool.

Compliance Testing:

• Testing a data link in isolation is never sufficient; links must be tested in combination with other noise sources.
• Isolate Effects to pinpoint sources of error
• Quantify Your Results with stress testing

Debugging Hardware

• Chop the System into small pieces for initial tests
• Remain Ever Vigilant for even the smallest clue about system behavior.
• Keep Meticulous Records
• Use your simulator to maximum effect

Measurement Problems

• Measuring tiny voltages
• ESD Induces Large Voltages
• ESD Induces Large Currents

Personnel issues

• Working with Consultants
• Assigning your best engineers to critical design tasks

Practical System-Design Advice (Wrap-up)

1. With the development of any new product, limit your use of new and untried technical innovations to five.
2. Never fully utilize any ASIC or custom IC. As you approach 100% utilization, the difficulty of routing and placement approaches infinity.
3. Ignore the maximum toggle frequency for a flip-flop.
4. Once you obtain a decent probe, immediately pin a big REWORK tag on it. The tag may discourage others from taking it.
5. Stress Test Everything
6. Build plenty of test outputs into every ASIC.
7. With passive components, never specify the most extreme value listed in a catalog.
8. Always include a few spare traces on a backplane. You never know what additional features you may need later.
9. Your first version of a product need not adhere to the final form factor. If it does, you have wasted a lot of valuable engineering time by mechanically squeezing everything into the final packaging.
10. Hire Only First-Rate People

About the Lecturer

Dr. Howard Johnson,
Signal Consulting Inc.

Dr Johnson has taught thousands of students at companies all over the world, including: 3Com Corp.; IBM; Allied-Signal; Intel; Bay Networks; Mentor Graphics; Cisco Systems; Motorola; Compaq Computer; NASA; Network Equipment Technologies; Level One Communications; Siemens; DEC; Northern Telecom; Dell Computer; Sandia Nat'l Labs; Ericsson Telecom; Sun Microsystems; GEC Marconi; Texas Instruments; Hewlett-Packard; VLSI Technology.